In the, by now, common Programmable Logic Controllers (PLC), but also in many other applications, data links for communicating between separate devices are often implemented as data busses having a daisy chain configuration. A daisy chained bus is formed by linking a transmit output of a device to a receive output of a following device. The resulting chain is controlled by a master which generates control signals for shifting the data and the timing thereof
The daisy chain structure is particularly suited for data exchange via a Serial Peripheral Interface (SPI) bus which is a synchronous serial data link standard. Devices communicate in master/slave mode wherein the master initiates the data frames. Herein, a data frame is a series of data packets, wherein the beginning of a frame is indicated by enabling a slave select signal and the end of the frame is indicated by disabling the slave select signal. In an independent slave SPI configuration, multiple slave devices are allowed with individual slave select lines for each slave.
In contrast to the independent slave SPI configuration, the daisy chain configuration provides only a single slave select line for all slaves. Herein, data may be sent during a first group of clock pulses and, during a second group of clock pulses, the received data may be forwarded to the next member of the daisy chain. Accordingly, the SPI port of each slave is designed to send out, during the second group of clock pulses, an exact copy of what it received during the first group of clock pulses. Therefore, the whole chain may be considered as an SPI communication shift register.
FIG. 1 shows an example for a typical daisy chain structure based on SPI. This structure is solely exemplary, in particular, the connection structure and the number of slaves are arbitrary. Different connection structures and other numbers of slaves are also possible.
SPI master 110 comprises a transmit buffer 110a having a data output (DO), a receive buffer 110b having a data input (DI), and a baud rate generator 110c for generating a slave select signal (SLS) and a shift clock signal (SCLK). A first SPI slave 121 comprises a transmit buffer 121a having a data output (DO), a receive buffer 121b having a data input (DI), and a so called slave function block 121c which indicates the actual function of the first slave 121. A second SPI slave 122 comprises a transmit buffer 122a having a data output (DO), a receive buffer 122b having a data input (DI), and a so called slave function block 122c which indicates the actual function of the second slave 122. A third SPI slave 123 comprises a transmit buffer 123a having a data output (DO), a receive buffer 123b having a data input (DI), and a so called slave function block 123c which indicates the actual function of the first slave 123.
The data output of the master 110 is connected to the data input of the first slave 121 via connection 101; the data output of the first slave 121 is connected to the data input of the second slave via connection 102; the data output of the second slave is connected to the data input of the third slave 123 via connection 103; and the data output of the third slave 123 is connected to the data input of the master via connection 104. The first (121), second (122) and third (123) slave are connected to the baud rate generator 110c of the master 110 via connection 105 for receiving a slave select signal (SLS) and also via connection 106 for receiving a shift clock signal (SCLK).
FIG. 2 shows an example typical for a data exchange between members of a daisy chain such as shown in FIG. 1. In a daisy chain configuration, each member transmits its own transmit date to its data output at the beginning of a frame and then forwards data already received by then. Thus, a complete frame comprises a series of data of the individual members wherein the data is transmitted consecutively. Each member has its own word which is transmitted. As an example, “DS01” indicates the word of the first slave 121, etc. Only the master sends an amount of data which equals the added word length of all slaves. In FIG. 2, the target data of the master for the first slave 121 is indicated as “DM01”, etc.
The order of data within a frame, as exemplarily depicted in FIG. 2, is determined by the arrangement of the slaves in the daisy chain, in the example shown in FIG. 2, the exemplary daisy chain structure of FIG. 1. It is noted that the term “frame” as used herein indicates the time period in which the slave select signal is active and data is transmitted to all members once.
The master first receives a word from the slave which is adjacent to the receiver of the master in the chain, which, in this example, is the third slave 123, and then the word from the slave which is the next one in the chain (when starting from the receiver of the master), which, in this example, is the second slave 122, etc.
The order of data sent from the master to the slaves is determined by the arrangement of the slaves in the chain in a similar way: The data for the slave being most remote from the transmitter of the master in the chain (here: the third slave) is sent first, then the data for the previous one in the chain (here: the second slave) and the data for the slave which is adjacent to the transmitter of the master in the chain (here: the first slave) is sent last.
The frame is initiated by the master activating the slave select signal and, by deactivating the slave select signal, the master indicates to all members of the chain (i.e. slaves) that the frame is completed and the data received last (i.e. content of the respective receive buffer) is the target data for the respective member and can be taken into account by the slave function.
Each slave includes a receive buffer having the same size (i.e. word size=number of bits) as its own data in the transmit buffer. The bit width may differ depending on the function of the respective member. When the content of its transmit buffer has completely been sent after the beginning of the frame, the data received in the meantime are forwarded. Not until the end of the frame, the data in the receive buffer are considered valid. Until then, the data in the receive buffer are simply shifted, i.e. forwarded.
The actual functions of the slaves 121, 122 and 123 which are represented by the function blocks 121c, 122c and 123c, respectively, receive the data sent by the master (MS01, MS02, MS03) when the frame is completed and can provide read data (DS01, DS02, DS03).
In particular, but not solely, in the case of PLC applications, many present or also future slave devices also require, in addition to the actual input/output function (as already described with reference to FIGS. 1 and 2), also control and diagnostic functions or capabilities. These functions run in parallel to normal operation of the master-slave arrangement or include power saving capabilities.
In order to obtain meaningful diagnostics of the function in- and outputs, a relatively large amount of data has to be analyzed at certain points (e.g. determining edge steepness when switching). Depending on the application, the kind of diagnostics may also vary.
It is advantageous to provide local diagnostics capabilities in or near the slave to be monitored in order to avoid interfering with or delaying data communication in the master-slave arrangement. Accordingly, a diagnostics unit operated in parallel to the slave may be provided, which monitors inputs and outputs of the slave according to application requirements and transmits status information to the master.
FIG. 3 shows an exemplary implementation of a diagnostics unit operated in parallel to a slave in a master-slave arrangement similar to the one shown in FIG. 1. Only the second slave 222 has been modified in that its function block 222c comprises a diagnostic function and a connection 207 between the diagnostic function block 222c of the second slave 222 and the function block 223c of the third slave 223 has been added in FIG. 3. Thus, the diagnostic device for the third slave 223 is implemented as a slave device arranged within the daisy chain and connected to the slave to be monitored.
As the requirements for such diagnostic devices differ widely, development of specific devices proves difficult, however. Instead, provision of appropriate programmable devices, such as microcontrollers, may be more practical. In this case, however, another problem arises: Though most (low cost) microprocessors comprise an SPI interface, their interfaces are usually not adapted for daisy chain configurations or a high internal clock rate is required to operate the interface.
Therefore, there e.g. exists a need for a low cost coupling device which is adapted to be implemented in daisy chain configurations (“daisy chain capability”) and enables coupling via a standard interface of the microprocessor.